2005 Microchip Technology Inc.
Preliminary
DS41265A-page 179
PIC16F946
14.12.3
TRANSMISSION
When the R/W bit of the incoming address byte is set
and an address match occurs, the R/W bit of the
SSPSTAT register is set. The received address is
loaded into the SSPBUF register. The ACK pulse will
be
sent
on
the
ninth
bit,
and
pin
RC6/TX/CK/SCK/SCL/SEG9 is held low. The transmit
data must be loaded into the SSPBUF register, which
also
loads
the
SSPSR
register.
Then,
pin
RC6/TX/CK/SCK/SCL/SEG9 should be enabled by
setting bit CKP (SSPCON<4>). The master must mon-
itor the SCL pin prior to asserting another clock pulse.
The slave devices may be holding off the master by
stretching the clock. The eight data bits are shifted out
on the falling edge of the SCL input. This ensures that
the SDA signal is valid during the SCL high time
An SSP interrupt is generated for each data transfer
byte. Flag bit SSPIF must be cleared in software, and
the SSPSTAT register is used to determine the status
of the byte. Flag bit SSPIF is set on the falling edge of
the ninth clock pulse.
As a slave-transmitter, the ACK pulse from the master
receiver is latched on the rising edge of the ninth SCL
input pulse. If the SDA line was high (not ACK), then
the data transfer is complete. When the ACK is latched
by the slave, the slave logic is reset (resets SSPSTAT
register) and the slave then monitors for another occur-
rence of the Start bit. If the SDA line was low (ACK), the
transmit data must be loaded into the SSPBUF register,
which also loads the SSPSR register. Then pin
RC6/TX/CK/SCK/SCL/SEG9 should be enabled by
setting bit CKP.
FIGURE 14-10:
I2C WAVEFORMS FOR TRANSMISSION (7-BIT ADDRESS)
SDA
SCL
SSPIF (PIR1<3>)
BF (SSPSTAT<0>)
CKP (SSPCON<4>)
A7
A6
A5
A4
A3
A2
A1
ACK
D7
D6
D5
D4
D3
D2
D1
D0
ACK
Transmitting Data
R/W = 1
Receiving Address
1
2
3
4
56789
123
4
5
67
8
9
P
Cleared in software
SSPBUF is written in software
From SSP Interrupt
Service Routine
Set bit after writing to SSPBUF
S
Data in
sampled
SCL held low
while CPU
responds to SSPIF
(the SSPBUF must be written to
before the CKP bit can be set)
相关PDF资料
2-1546217-0 TERM BLK RCPT 20POS SIDE 5.08MM
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1-1546217-8 TERM BLK RCPT 18POS SIDE 5.08MM
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